Don't stop, keep moving! Make a little progress every day.
As an ICer, we often have to introduce our project to team members at the review meeting. Or we need to describe one latest project to the interviewer when seeking a job.
Today, we learn some frequently used sentences and phrases about IC projects.
The major goal of the project is to create a free and open processor for embedded systems. This includes:
The Minimal OpenRISC System on Chip is a system on chip (SoC) implementation with standard IP cores available at OpenCores. This implementation consists of a standard project comprehending the standard IP cores necessary for a SoC embedding the OpenRISC implementation OR1200.
This project idea is to offer a synthesizable SoC which can be uploaded to every FPGA and be compatible with every FPGA board without the requirement of changing its code. In order to deliver such a project, the project has been based on a standard memory implementation and the Advanced Debug System, which allows system debug and software upload with the same cables used for FPGA configuration.
The adaptation of the project to a target board is made in 2 steps maximum. First, the “minsoc_defines.v” file has to be adjusted, generally one has to only uncomment his FPGA manufacturer and FPGA model definitions. After that, a constraint file for your specific pinout has to be created. Constraint files for standard boards can be found in the backend directory of the project.
Furthermore, the project offers working testbench and firmwares for its SoC. The current testbench can be run out of the box using Icarus Verilog v. 9.1. The firmwares are nearly the same of those of orpsocv2. The differences are for now, that the known UART "hello world" example now runs with interrupts and a new Ethernet example has been added to it.
To complete, an on-chip memory instance is provided to embed the CPU's firmware. The size of this memory can be adapted defining its address width inside of the same minsoc_defines.v file, affecting simulation and synthesis equally. This enables the customization of the SoC to the available resources of the target FPGA, for general purposes, or to the memory amount required by the target firmware, for custom implementation, e.g. ASIC.
An overview about the complete SoC and its external connections is on Figure 1.
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange between devices. It is primarily used in the consumer and telecom market sector and as a board level communications protocol. The OpenCores I2C Master Core provides an interface between a Wishbone Master and an I2C bus. It is an easy path to add I2C capabilities to any Wishbone compatible system. You can find the I2C specifications on Phillips website. Work was originally started by Frédéric Renet. You can find his webpage here.
In the above three examples, we can see some words or phrases which are used many times, such as is, provide, with, offer, allow, which can be, enable, include, consist of, support, compatible with, etc.
Now, try to introduce a project you are most familiar with using the above words and phrases.
Articles in IC English Series:
how do you write bussiness emails and weekly reports
how to run an effective meeting
How to introduce a project in a meeting